Co-located with HiPEAC 2019 Conference, Valencia, 21 January 2019

Scope of the Workshop

Security features prominently in the HiPEAC Horizon 2020 roadmap, both in Embedded and Mobile Systems strategic areas. Yet the hardware and software security community and the HiPEAC community have few points of contact. The main goal of this workshop is to provide a venue for security and cryptography experts to interact with the computer architecture and compilers community, aiming at cross-fertilization and multi-disciplinary approaches to security in computing systems. The wide diffusion of embedded systems, including multi-core, many-core, and reconfigurable platforms, poses a number of challenges related to the security of the operation of such systems, as well as of the information stored in them. Malicious adversaries can leverage unprotected communication to hijack cyber-physical systems, resulting in incorrect and potentially highly dangerous behaviours, or can exploit implementation specific vulnerabilities arising from the observation of side channel information (e.g., power, timing, electromagnetic emissions) and/or the malicious fault injections to recover secret information from a computing system. Untrustworthy third party software and hardware can create openings for such attacks, which must be detected and removed or countered. The prevalence of multi/many core systems opens additional issues such as NoC security. Finally, the complexity on modern and future embedded and mobile systems leads to the need to depart from manual planning and deployment of security features. Thus, design automation tools will be needed to design and verify the security features of new hardware/software systems. The workshop is a venue for security and cryptography experts to interact with the computer architecture and compilers community, aiming at cross-fertilization and multi-disciplinary approaches to security in computing systems.

Topics of interest include, but are not limited to:
  • Compiler and Runtime Support for Security
  • Cryptography in Embedded and Reconfigurable Systems
  • Design Automation and Verification of Security
  • Efficient Cryptography through Multi/Many core Systems
  • Fault Attacks and Countermeasures, including interaction with Fault Tolerance
  • Hardware Architecture and Extensions for Cryptography
  • Hardware/Software Security Techniques
  • Hardware Trojans and Reverse Engineering
  • Physical Unclonable Functions
  • Reliability & Privacy in Embedded Systems
  • Security of Cyberphysical Systems
  • Security of Networks-on-Chips and Multi-core Architectures
  • Side Channel Attacks and Countermeasures
  • Engineering and efficient implementation of post-quantum cryptographic primitives
The workshop seeks submissions from academia and industry, presenting novel research contributions and industrial case studies.

Important Dates

  • Paper Submission: November 15, 2018
  • Acceptance Notification: December 15, 2018
  • Camera Ready Version: December 21, 2018

Information for authors

All submissions must be written in English, and should be anonymized. All papers will be double-blind refereed. Regular submissions should be at most 6 pages in the ACM double-column format including bibliography. Please, use the following template when preparing your manuscript:
Authors must submit their papers (in PDF format) by the deadline indicated above, using the EasyChair web site:

Organizing Committee

  • Giovanni Agosta
    Politecnico di Milano
  • Karine Heydemann
    Sorbonne Université
  • Alessandro Barenghi
    Politecnico di Milano
  • Gerardo Pelosi
    Politecnico di Milano

Program Committee

  • Isaac Agudo
  • NICS Lab at University of Malaga

  • Lejla Batina
  • Radboud University Nijmegen

  • Dajana Cassioli
  • Università dell'Aquila

  • Hervé Chabanne
  • Morpho

  • Alessandro Cilardo
  • Univ. of Naples Federico II

  • Damien Couroussé
  • CEA

  • Fabrizio De Santis
  • Siemens

  • Giorgio Di Natale

  • Jean-Max Dutertre
  • Ecole Nationale Supérieure des Mines de Saint Etienne

  • Alberto Ferrante
  • ALaRI, Università della Svizzera italiana

  • Aurélien Francillon

  • Jacques Fournier
  • CEA

  • Frank Güurkaynak
  • ETH Zürich

  • Vianney Lapotre,
  • Univ. Bretagne Sud

  • Paolo Maistri, TIMA
  • José Onieva
  • University of Malaga

  • Pierluigi Pierini

  • Francesco Regazzoni
  • ALaRI - USI (Switzerland)

  • Luigi Romano
  • Univ. of Naples "Parthenope"

  • Joern-Marc Schmidt
  • Deutsch Bank

  • Nicolas Sklavos
  • University of Patras
  • Hermann Seuschek
  • Siemens

  • Leonel Sousa

  • Christos Strydis
  • Erasmus Medical Center, The Netherlands

  • Yannick Teglia
  • Gemalto