Co-located with HiPEAC 2017 Conference, Stockholm, 24 January 2017

Scope of the Workshop

The wide diffusion of embedded systems, including multi-core, many-core, and reconfigurable platforms, poses a number of challenges related to the security of the operation of such systems, as well as of the information stored in them. Malicious adversaries can leverage unprotected communication to hijack cyber-physical systems, resulting in incorrect and potentially highly dangerous behaviours, or can exploit side channel information leakage to recover secret information from a computing system. Untrustworthy third party software and hardware can create openings for such attacks, which must be detected and removed or countered. The prevalence of multi/many core systems opens additional issues such as NoC security. Finally, the complexity on modern and future embedded and mobile systems leads to the need to depart from manual planning and deployment of security features. Thus, design automation tools will be needed to design and verify the security features of new hardware/software systems. The workshop is a venue for security and cryptography experts to interact with the computer architecture and compilers community, aiming at cross-fertilization and multi-disciplinary approaches to security in computing systems.

Topics of interest include, but are not limited to:
  • Compiler and Runtime Support for Security
  • Cryptography in Embedded and Reconfigurable Systems
  • Design Automation and Verification of Security
  • Efficient Cryptography through Multi/Many core Systems
  • Fault Attacks and Countermeasures, including interaction with Fault Tolerance
  • Passive Side Channel Attacks and Countermeasures
  • Hardware Architecture and Extensions for Cryptography
  • Hardware/Software Security Techniques
  • Hardware Trojans and Reverse Engineering
  • Physical Unclonable Functions
  • Privacy in Embedded Systems
  • Security of Embedded and Cyberphysical Systems (Medical, Automotive, Smartgrid, Industrial Control)
  • Security of Networks-on-Chips and Multi-core Architectures
  • Trusted computing
The workshop seeks submissions from academia and industry, presenting novel research contributions and industrial case studies.

Important Dates

  • Paper Submission: November 15, 2016
  • Acceptance Notification: December 18, 2016
  • Camera Ready Version: December 21, 2016

Information for authors

All submissions must be written in English, and should be anonymized. All papers will be double-blind refereed. Regular submissions should be at most 6 pages in the ACM double-column format including bibliography. Please, use the following template when preparing your manuscript:
Authors must submit their papers (in PDF format) by the deadline indicated above, via Easychair here.

Organizing Committee

  • Gerardo Pelosi
    Politecnico di Milano
  • Alessandro Barenghi
    Politecnico di Milano
  • Israel Koren
    UMass Amherst
  • Giovanni Agosta
    Politecnico di Milano

Program Committee

  • Giovanni Agosta
  • Politecnico di Milano
  • Alessandro Barenghi
  • Politecnico di Milano
  • Andrey Bogdanov
  • Technical University of Denmark
  • Hervé Chabanne
  • Morpho
  • Alessandro Cilardo
  • Univ. of Naples Federico II

  • Fabrizio De Santis
  • Technische Universität München
  • Giorgio Di Natale
  • Elena Dubrova
  • Royal Institute of Technology
  • Alberto Ferrante
  • ALaRI, Università della Svizzera italiana
  • Leandro Fiorin
  • IBM Research

  • Jacques Fournier
  • CEA Tech

  • Sylvain Guilley

  • Paris Kitsos
  • Technological Educational Institute of Western Greece
  • Paolo Maistri
  • TIMA Laboratory
  • Jose A. Onieva
  • University of Malaga
  • Gerardo Pelosi
  • Politecnico di Milano
  • Francesco Regazzoni
  • ALaRI - Università della Svizzera italiana
  • Luigi Romano
  • University of Naples "Parthenope"

  • Leonel Sousa
  • INESC-ID, IST, Universidade de Lisboa
  • Christian Steger
  • TU Graz

  • Ingo Stengel
  • Plymouth University

  • Christos Strydis
  • Erasmus Medical Center, The Netherlands

  • Yannick Teglia
  • Gemalto
  • Davide Zoni
  • Politecnico di Milano
  • To be completed